RTL is the acronym Resistor Transistor Logic or resistance-transistor logic. It was the first logic family to appear before the integration technology. Belongs to the category of bipolar logic families, or involve the existence of two types of carriers: electrons and holes.
This type of network, presents the phenomenon called power grab that occurs when multiple transistors are coupled directly and input characteristics differ slightly from each other. Then one of them lead before the others placed in parallel (monopolize the flow), preventing the proper functioning of the rest.
This circuit arrangement has the disadvantage that with the addition of resistance Rc increases the switching delay, having to be loaded and unloaded through the same input capacitance of transistors but on the other hand, has the advantage of increased output factor (fan -out). Therefore, in the design of these circuits is necessary compromise between output and factor switching delay. Normal values \u200b\u200bare output by a factor of 4 or 5, with a switching delay of 50 nanoseconds.
other hand, has a relatively poor noise immunity. The noise margin voltage to the logic 0 threshold voltage is about 0.5 volts, but voltage logic 1 to the threshold voltage is only about 0.2 volts.
may improve travel time by adding a capacitor in parallel with each of the resistors Rc, which would get a new logic family, to be called RCTL. However, the large number of resistors and capacitors difficult to integrate so much the technique, such as RTL, not used in modern designs but can still be found in very old equipment.
This type of network, presents the phenomenon called power grab that occurs when multiple transistors are coupled directly and input characteristics differ slightly from each other. Then one of them lead before the others placed in parallel (monopolize the flow), preventing the proper functioning of the rest.
This circuit arrangement has the disadvantage that with the addition of resistance Rc increases the switching delay, having to be loaded and unloaded through the same input capacitance of transistors but on the other hand, has the advantage of increased output factor (fan -out). Therefore, in the design of these circuits is necessary compromise between output and factor switching delay. Normal values \u200b\u200bare output by a factor of 4 or 5, with a switching delay of 50 nanoseconds.
other hand, has a relatively poor noise immunity. The noise margin voltage to the logic 0 threshold voltage is about 0.5 volts, but voltage logic 1 to the threshold voltage is only about 0.2 volts.
may improve travel time by adding a capacitor in parallel with each of the resistors Rc, which would get a new logic family, to be called RCTL. However, the large number of resistors and capacitors difficult to integrate so much the technique, such as RTL, not used in modern designs but can still be found in very old equipment.
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